 English |
|
|
|
|
|
|
|
| HD6413007F20 Datasheet, PDF (630/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series | |||
| |||
| ◁ |
20. Electrical Characteristics
Ï
A23 to A0
Tp
tAD
CS5 to CS2
(RAS5 to RAS2)
UCAS, LCAS
(read)
Tr
TC1
tAD
tAD
tAS1
tRP
tRAH
tRAD1
tASD
TC2
tCAS1
tRAD2
tCASD2
tCP
RD (WE)
(read)
(High)
D15 to D0
(read)
UCAS, LCAS
(write)
RD (WE)
(write)
D15 to D0
(write)
tRAC
tAA
tRDS
tRDH*
tCAC
tCASD1
tASD
tCAS2
tCASD2
tCP
tWCD
tWCS
tWDD tWDS
tWCH
tWDH
RFSH
(High)
Note: * Specification from the earliest negation timing of RAS and CAS.
Figure 20.14 DRAM Bus Timing (Read/Write)
Rev.5.00 Sep. 12, 2007 Page 600 of 764
REJ09B0396-0500
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese