HD6413007F20 Datasheet, PDF (640/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix A Instruction Set
Addressing Mode and
Instruction Length (bytes)
No. of
States*¹
Mnemonic
MOV.W @aa:24, Rd W
MOV.W Rs, @ERd W
MOV.W Rs, @(d:16, W
ERd)
MOV.W Rs, @(d:24, W
ERd)
MOV.W Rs, @–ERd W
6
2
4
8
2
MOV.W Rs, @aa:16 W
4
MOV.W Rs, @aa:24 W
6
MOV.L #xx:32, Rd L 6
MOV.L ERs, ERd
L
2
MOV.L @ERs, ERd L
4
MOV.L @(d:16, ERs), L
6
ERd
MOV.L @(d:24, ERs), L
10
ERd
MOV.L @ERs+, ERd L
4
MOV.L @aa:16, ERd L
MOV.L @aa:24, ERd L
MOV.L ERs, @ERd L
MOV.L ERs, @(d:16, L
ERd)
MOV.L ERs, @(d:24, L
ERd)
MOV.L ERs, @–ERd L
6
8
4
6
10
4
MOV.L ERs, @aa:16 L
6
MOV.L ERs, @aa:24 L
8
POP.W Rn W
W
POP.L ERn L
L
Rev.5.00 Sep. 12, 2007 Page 610 of 764
REJ09B0396-0500
Condition Code
Operation
I HNZVC
@aa:24 → Rd16
⎯⎯
0⎯ 8
Rs16 → @ERd
⎯⎯
0⎯ 4
Rs16 → @(d:16, ERd) ⎯ ⎯
0⎯ 6
Rs16 → @(d:24, ERd) ⎯ ⎯
0 ⎯ 10
ERd32–2 → ERd32
Rs16 → @ERd
⎯⎯
Rs16 → @aa:16
⎯⎯
Rs16 → @aa:24
⎯⎯
#xx:32 → Rd32
⎯⎯
ERs32 → ERd32
⎯⎯
@ERs → ERd32
⎯⎯
@(d:16, ERs) → ERd32 ⎯ ⎯
0⎯ 6
0⎯ 6
0⎯ 8
0⎯ 6
0⎯ 2
0⎯ 8
0 ⎯ 10
@(d:24, ERs) → ERd32 ⎯ ⎯
0 ⎯ 14
@ERs → ERd32
ERs32+4 → ERs32
⎯⎯
@aa:16 → ERd32
⎯—
@aa:24 → ERd32
⎯—
ERs32 → @ERd
⎯⎯
ERs32 → @(d:16, ERd) ⎯ ⎯
0 ⎯ 10
0 ⎯ 10
0 ⎯ 12
0⎯ 8
0 ⎯ 10
ERs32 → @(d:24, ERd) ^{⎯ ⎯}
0 ⎯ ₁₄
ERd32–4 → ERd32
ERs32 → @ERd
ERs32 → @aa:16
ERs32 → @aa:24
2 @SP → Rn16
SP+2 → SP
4 @SP → ERn32
SP+4 → SP
⎯⎯
⎯⎯
⎯⎯
⎯⎯
⎯⎯
0 ⎯ ₁₀
0 ⎯ 10
0 ⎯ 12
0⎯ 6
0 ⎯ 10