HD6413007F20 Datasheet, PDF (110/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

5. Interrupt Controller
5.1.2 Block Diagram
Figure 5.1 shows a block diagram of the interrupt controller.
NMI
input
IRQ input
OVF
TM....... E
...
TEI
TEIE
ISCR IER
IRQ input
section ISR
IPRA, IPRB
Interrupt
Priority
request
decision logic
Vector
number
Interrupt controller
Legend:
ISCR: IRQ sense control register
IER: IRQ enable register
ISR: IRQ status register
IPRA: Interrupt priority register A
IPRB: Interrupt priority register B
SYSCR: System control register
UE
SYSCR
Figure 5.1 Interrupt Controller Block Diagram
CPU
I
CCR
UI
Rev.5.00 Sep. 12, 2007 Page 80 of 764
REJ09B0396-0500