HD6413007F20 Datasheet, PDF (684/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix B Internal I/O Registers
CSCR⎯Chip Select Control Register
H'EE01F
Bit
7
6
5
4
3
2
CS7E CS6E CS5E CS4E
⎯
⎯
Initial value
0
0
0
0
1
1
Read/Write R/W
R/W
R/W R/W
⎯
⎯
Bus controller
1
0
⎯
⎯
1
1
⎯
⎯
Chip select 7 to 4 enable
Bit n
CSnE
0
1
Description
Output of chip select signal CSn is disabled (Initial value)
Output of chip select signal CSn is enabled
Note: n = 7 to 4
ABWCR⎯Bus Width Control Register
H'EE020
Bus controller
Bit
7
ABW7
Modes 1, 3 Initial value
1
Modes 2, 4 Initial value
0
Read/Write R/W
6
ABW6
1
0
R/W
5
4
3
ABW5 ABW4 ABW3
1
1
1
0
0
0
R/W R/W R/W
2
ABW2
1
0
R/W
1
0
ABW1 ABW0
1
1
0
0
R/W R/W
Area 7 to 0 bus width control
Bits 7 to 0
ABW7
to ABW0
0
1
Bus Width of Access Area
Areas 7 to 0 are 16-bit access areas
Areas 7 to 0 are 8-bit access areas
Rev.5.00 Sep. 12, 2007 Page 654 of 764
REJ09B0396-0500