HD6413007F20 Datasheet, PDF (329/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

9. 16-Bit Timer
Bit 1⎯Input Capture/Compare Match Flag A1 (IMFA1): This status flag indicates GRA1
compare match or input capture events.
Bit 1
IMFA1
0
1
Description
[Clearing conditions]
(Initial value)
• Read IMFA1 when IMFA1 =1, then write 0 in IMFA1.
• DMAC activated by IMIA1 interrupt.
[Setting conditions]
• 16TCNT1 = GRA1 when GRA1 functions as an output compare register.
• 16TCNT1 value is transferred to GRA1 by an input capture signal when GRA1
functions as an input capture register.
Bit 0⎯Input Capture/Compare Match Flag A0 (IMFA0): This status flag indicates GRA0
compare match or input capture events.
Bit 0
IMFA0
0
1
Description
[Clearing conditions]
(Initial value)
• Read IMFA0 when IMFA0 =1, then write 0 in IMFA0.
• DMAC activated by IMIA0 interrupt.
[Setting conditions]
• 16TCNT0 = GRA0 when GRA0 functions as an output compare register.
• 16TCNT0 value is transferred to GRA0 by an input capture signal when GRA0
functions as an input capture register.
Rev.5.00 Sep. 12, 2007 Page 299 of 764
REJ09B0396-0500