HD6413007F20 Datasheet, PDF (723/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

TCSR⎯Timer Control/Status Register
Bit
7
OVF
Initial value
0
Read/Write R/(W)*
6
WT/IT
0
R/W
5
TME
0
R/W
Appendix B Internal I/O Registers
H'FFF8C
4
3
⎯
⎯
1
1
⎯
⎯
2
CKS2
0
R/W
1
CKS1
0
R/W
WDT
0
CKS0
0
R/W
Clock select 2 to 0
CKS2 CKS1 CKS0 Description
0 φ/2
0
1 φ/32
0
0 φ/64
1
1 φ/128
0 φ/256
0
1 φ/512
1
0 φ/2048
1
1 φ/4096
Timer enable
Timer disabled
0 • TCNT is initialized to H'00 and
halted
Timer enabled
1
• TCNT is counting
Timer mode select
Interval timer:
0 _{requests interval timer interrupts}
Watchdog timer:
1 _{generates a reset signal}
Overflow flag
[Clearing condition]
0 Read OVF when OVF = 1, then write 0 in OVF
[Setting condition]
1
TCNT changes from H'FF to H'00
Note: * Only 0 can be written, to clear the flag.
Rev.5.00 Sep. 12, 2007 Page 693 of 764
REJ09B0396-0500