HD6413007F20 Datasheet, PDF (311/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

8. I/O Ports
Pin
Pin Functions and Selection Method
PB /TP /
4
12
UCAS
Bit NDER12 in NDERB and bit PB DDR select the pin function as follows.
4
PB DDR
0
1
1
4
NDER12
⎯
0
1
Pin function
PB₄ input
PB₄ output
UCAS output*
TP₁₂ output
Note: * UCAS output depending on bits DRAS2 to DRAS0 in DRCRA and bit
CSEL in DRCRB, and regardless of bits NDER12 and PB DDR. For details, see
4
section 6, Bus Controller.
PB₃/TP₁₁/ The DRAM interface settings by bits DRAS2 to DRAS0 in DRCRA, bits OIS3/2 and
TMIO /
3
OS1/0 in 8TCSR3, bits CCLR1 and CCLR0 in 8TCR3, bit CS4E in CSCR, bit
DREQ₁/CS₄ NDER11 in NDERB, and bit PB₃DDR select the pin function as follows.
DRAM interface
settings
(1) in table below
(2) in
table
below
OIS3/2 and
OS1/0
All 0
Not all 0
⎯
CS4E
0
1
⎯
⎯
PB₃DDR
NDER11
0
1
⎯
0
1
⎯
⎯
⎯
1
⎯
⎯
⎯
Pin function
PB₃
input
PB₃
output
TP₁₁
output
CS
4
output
TMIO₃
output
CS
4
output*³
TMIO₃ input*¹
DREQ
1
input*²
Notes: 1. TMIO3 input when CCLR1 = CCLR0 = 1.
2. When an external request is specified as a DMAC activation source,
DREQ1 input regardless of bits OIS3 and OIS2, OS1 and OS0, CCLR1
and CCLR0, CS4E, NDER11, and PB3DDR.
3. CS4 is output as RAS₄.
DRAM interface
(1)
settings
(2)
(1)
DRAS2
0
1
DRAS1
0
1
0
1
DRAS0
0
1
0
1
0
1
0
1
Rev.5.00 Sep. 12, 2007 Page 281 of 764
REJ09B0396-0500