HD6413007F20 Datasheet, PDF (393/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

10. 8-Bit Timers
Bit 4⎯A/D Trigger Enable (ADTE) (8TCSR0): In combination with TRGE in the A/D control
register (ADCR), enables or disables A/D converter start requests by compare match A or an
external trigger. Bit 4 of 8TCSR2 is reserved, but can be read and written.
Bit 4
TRGE* ADTE
Description
0
0
A/D converter start requests by compare match A or an external trigger pin
(ADTRG) input are disabled
(Initial value)
1
A/D converter start requests by compare match A or an external trigger pin
(ADTRG) input are disabled
1
0
A/D converter start requests by an external trigger pin (ADTRG) are enabled,
and A/D converter start requests by compare match A are disabled
1
A/D converter start requests by compare match A are enabled, and A/D
converter start requests by an external trigger pin (ADTRG) are disabled
Note: * TRGE is bit 7 of the A/D control register (ADCR).
Bit 4⎯Reserved (In 8TCSR1): This bit is a reserved bit, but can be read and written.
Bit 4⎯Input Capture Enable (ICE) (In 8TCSR1 and 8TCSR3): Selects the function of
TCORB1 and TCORB3.
Bit 4
ICE
0
1
Description
TCORB1 and TCORB3 are compare match registers
TCORB1 and TCORB3 are input capture registers
(Initial value)
When bit ICE is set to 1 in 8TCSR1 or 8TCSR3, the operation of the TCORA and TCORB
registers in channels 0 to 3 is as shown in the tables below.
Rev.5.00 Sep. 12, 2007 Page 363 of 764
REJ09B0396-0500