HD6413007F20 Datasheet, PDF (720/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix B Internal I/O Registers
8TCSR0⎯Timer Control/Status Register 0
H'FFF82
Bit
7
6
5
4
3
2
1
0
CMFB CMFA OVF ADTE OIS3 OIS2 OS1 OS0
Initial value
0
0
0
0
0
0
0
0
Read/Write R/(W)* R/(W)* R/(W)* R/W
R/W
R/W
R/W R/W
8-bit timer channel 0
Output select A1 and A0
Bit 1 Bit 0
OS1 OS0
Description
0 No change at compare match A
0
1 0 output at compare match A
0 1 output at compare match A
1 _{1 Output toggles at compare}
match A
Output/input capture edge select B3 and B2
ICE in Bit 3 Bit 2
8TCSR1 OIS3 OIS2
Description
0 No change at compare match B
0
1 0 output at compare match B
0
0 1 output at compare match B
1
1 Output toggles at compare match B
0 TCORB input capture on rising edge
0
1 TCORB input capture on falling edge
1
1
0 TCORB input capture on both rising
and falling edges
1
A/D trigger enable
TRGE* ^{Bit 4}
ADTE
Description
0
A/D converter start requests by compare match
A or an external trigger are disabled
0
1
A/D converter start requests by compare match
A or an external trigger are enabled
0
A/D converter start requests by an external trigger are enabled, and
A/D converter start requests by compare match A are disabled
1
A/D converter start requests by compare match A are enabled, and
1 _{A/D converter start requests by an external trigger are disabled}
Note: * TRGE is bit 7 of the A/D control register (ADCR).
Timer overflow flag
0
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF.
1
[Setting condition]
8TCNT overflows from H'FF to H'00.
Compare match flag A
[Clearing condition]
0 _{Read CMFA when CMFA = 1, then write 0 in CMFA.}
1
[Setting condition]
8TCNT = TCORA
Compare match/input capture flag B
0 ^{[Clearing condition]}
Read CMFB when CMFB = 1, then write 0 in CMFB.
[Setting conditions]
1 ^{• 8TCNT = TCORB}
• The 8TCNT value is transferred to TCORB by an input capture signal when
TCORB functions as an input capture register.
Note: * Only 0 can be written to bits 7 to 5, to clear these flags.
Rev.5.00 Sep. 12, 2007 Page 690 of 764
REJ09B0396-0500