HD6413007F20 Datasheet, PDF (150/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

6. Bus Controller
Bit 5⎯Burst ROM Enable (BROME): Selects whether area 0 is a burst ROM interface area.
Bit 5
BROME
0
1
Description
Area 0 is a basic bus interface area
Area 0 is a burst ROM interface area
(Initial value)
Bit 4⎯Burst Cycle Select 1 (BRSTS1): Selects the number of burst cycle states for the burst
ROM interface.
Bit 4
BRSTS1
0
1
Description
Burst access cycle comprises 2 states
Burst access cycle comprises 3 states
(Initial value)
Bit 3⎯Burst Cycle Select 0 (BRSTS0): Selects the number of words that can be accessed in a
burst ROM interface burst access.
Bit 3
BRSTS0
0
1
Description
Max. 4 words in burst access (burst access on match of address bits above A3)
(Initial value)
Max. 8 words in burst access (burst access on match of address bits above A4)
Bit 2⎯Reserved: Read-only bit, always read as 1.
Bit 1⎯Area Division Unit Select (RDEA): Selects the memory map area division units. This bit
is valid in modes 3 and 4, and is invalid in modes 1 and 2.
Bit 1
RDEA
0
1
Description
Area divisions are as follows: Area 0: 2 Mbytes
Area 1: 2 Mbytes
Area 2: 8 Mbytes
Area 3: 2 Mbytes
Areas 0 to 7 are the same size (2 Mbytes)
Area 4: 1.93 Mbytes
Area 5: 4 kbytes
Area 6: 23.75 kbytes
Area 7: 22 bytes
(Initial value)
Rev.5.00 Sep. 12, 2007 Page 120 of 764
REJ09B0396-0500