HD6413007F20 Datasheet, PDF (701/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

DTCR0B⎯Data Transfer Control Register 0B
• Short address mode
Bit
7
6
5
4
3
DTE
DTSZ
DTID
RPE
DTIE
Initial value
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
Appendix B Internal I/O Registers
H'FFF2F
DMAC0
2
DTS2
0
R/W
1
DTS1
0
R/W
0
DTS0
0
R/W
Data transfer select
Bit 2 Bit 1 Bit 0
DTS2 DTS1 DTS0
Data Transfer Activation Source
0
0
Compare match/input capture A interrupt
from 16-bit timer channel 0
0
1
Compare match/input capture A interrupt
from 16-bit timer channel 1
1
0
Compare match/input capture A interrupt
from 16-bit timer channel 2
1 A/D converter conversion end interrupt
0 SCI0 transmit-data-empty interrupt
1
0
1 SCI0 receive-data-full interrupt
0 Falling edge of DREQ input
1
1 Low level of DREQ input
Data transfer interrupt enable
0
Interrupt requested by
DTE bit is disabled
Interrupt requested by
1 _{DTE bit is enabled}
Repeat enable
RPE DTIE
Description
0
0
I/O mode
1
0 Repeat mode
1
1 Idle mode
Data transfer increment/decrement
Incremented: If DTSZ = 0, MAR is incremented by 1 after each transfer
0
If DTSZ = 1, MAR is incremented by 2 after each transfer
Decremented: If DTSZ = 0, MAR is decremented by 1 after each transfer
1
If DTSZ = 1, MAR is decremented by 2 after each transfer
Data transfer size
0 Byte-size transfer
1 Word-size transfer
Data transfer enable
0 Data transfer is disabled
1 Data transfer is enabled
Rev.5.00 Sep. 12, 2007 Page 671 of 764
REJ09B0396-0500