HD6413007F20 Datasheet, PDF (648/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix A Instruction Set
6. Branching instructions
Addressing Mode and
Instruction Length (bytes)
No. of
States*¹
Mnemonic
BRA d:8 (BT d:8) ⎯
2
BRA d:16 (BT d:16) ⎯
4
BRN d:8 (BF d:8) ⎯
2
BRN d:16 (BF d:16) ⎯
4
BHI d:8
⎯
2
BHI d:16
⎯
4
BLS d:8
⎯
2
BLS d:16
⎯
4
BCC d:8 (BHS d:8) ⎯
2
BCC d:16 (BHS d:16) ⎯
4
BCS d:8 (BLO d:8) ⎯
2
BCS d:16 (BLO d:16) ⎯
4
BNE d:8
⎯
2
BNE d:16
⎯
4
BEQ d:8
⎯
2
BEQ d:16
⎯
4
BVC d:8
⎯
2
BVC d:16
⎯
4
BVS d:8
⎯
2
BVS d:16
⎯
4
BPL d:8
⎯
2
BPL d:16
⎯
4
BMI d:8
⎯
2
BMI d:16
⎯
4
BGE d:8
⎯
2
BGE d:16
⎯
4
BLT d:8
⎯
2
BLT d:16
⎯
4
BGT d:8
⎯
2
BGT d:16
⎯
4
Rev.5.00 Sep. 12, 2007 Page 618 of 764
REJ09B0396-0500
Branch
Condition Code
Operation Condition I H N Z V C
If condition Always
is true then
PC ←
PC+d else ^Never
next;
⎯⎯⎯⎯⎯⎯ 4
⎯⎯⎯⎯⎯⎯ 6
⎯⎯⎯⎯⎯⎯ 4
⎯⎯⎯⎯⎯⎯ 6
C∨Z=0 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 4
⎯⎯⎯⎯⎯⎯ 6
C∨Z=1 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 4
⎯⎯⎯⎯⎯⎯ 6
C=0
⎯⎯⎯⎯⎯⎯ 4
⎯⎯⎯⎯⎯⎯ 6
C=1
⎯⎯⎯⎯⎯⎯ 4
⎯⎯⎯⎯⎯⎯ 6
Z=0
⎯⎯⎯⎯⎯⎯ 4
⎯⎯⎯⎯⎯⎯ 6
Z=1
⎯⎯⎯⎯⎯⎯ 4
⎯⎯⎯⎯⎯⎯ 6
V=0
⎯⎯⎯⎯⎯⎯ 4
⎯⎯⎯⎯⎯⎯ 6
V=1
⎯⎯⎯⎯⎯⎯ 4
⎯⎯⎯⎯⎯⎯ 6
N=0
⎯⎯⎯⎯⎯⎯ 4
⎯⎯⎯⎯⎯⎯ 6
N=1
⎯⎯⎯⎯⎯⎯ 4
⎯⎯⎯⎯⎯⎯ 6
N⊕V = 0 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 4
⎯⎯⎯⎯⎯⎯ 6
N⊕V = 1 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 4
⎯⎯⎯⎯⎯⎯ 6
Z ∨ (N⊕V) ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 4
=0
⎯⎯⎯⎯⎯⎯ 6