HD6413007F20 Datasheet, PDF (574/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

17. RAM
17.1.2 Register Configuration
The on-chip RAM is controlled by SYSCR. Table 17.1 gives the address and initial value of
SYSCR.
Table 17.1 System Control Register
Address*
Name
Abbreviation
H'EE012
System control register
SYSCR
Note: * Lower 20 bits of the address in advanced mode.
R/W
R/W
Initial Value
H'09
17.2 System Control Register (SYSCR)
Bit
Initial value
Read/Write
7
SSBY
0
R/W
6
STS2
0
R/W
5
STS1
0
R/W
4
STS0
0
R/W
3
2
1
0
UE NMIEG SSOE RAME
1
0
0
1
R/W
R/W
R/W
R/W
RAM enable bit
Enables or
disables
on-chip RAM
Software standby
output port enable
NMI edge select
User bit enable
Standby timer select 2 to 0
Software standby
One function of SYSCR is to enable or disable access to the on-chip RAM. The on-chip RAM is
enabled or disabled by the RAME bit in SYSCR. For details about the other bits, see section 3.3,
System Control Register (SYSCR).
Rev.5.00 Sep. 12, 2007 Page 544 of 764
REJ09B0396-0500