HD6413007F20 Datasheet, PDF (649/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Addressing Mode and
Instruction Length (bytes)
Appendix A Instruction Set
No. of
States*¹
Mnemonic
BLE d:8
⎯
BLE d:16
⎯
JMP @ERn
⎯
2
JMP @aa:24
⎯
JMP @@aa:8
⎯
BSR d:8
⎯
BSR d:16
⎯
JSR @ERn
⎯
2
JSR @aa:24
⎯
JSR @@aa:8
⎯
RTS
⎯
Branch
Condition Code
Operation Condition I H N Z V C
2
If condition Z ∨ (N⊕V) = 0 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 4
4
is true then _{Z ∨ (N⊕V) = 1 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 6}
PC ←
PC+d else
next;
PC ← ERn
⎯⎯⎯⎯⎯⎯ 4
4
PC ← aa:24
⎯⎯⎯⎯⎯⎯ 6
2 PC ← @aa:8
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8 10
2
PC → @–SP
PC ← PC+d:8
⎯⎯⎯⎯⎯⎯ 6 8
4
PC → @–SP
PC ← PC+d:16
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8 10
PC → @–SP
PC ← @ERn
⎯⎯⎯⎯⎯⎯ 6 8
4
PC → @–SP
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8 10
PC ← @aa:24
2 PC → @–SP
PC ← @aa:8
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8 12
2 PC ← @SP+
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8 10
Rev.5.00 Sep. 12, 2007 Page 619 of 764
REJ09B0396-0500