HD6413007F20 Datasheet, PDF (679/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix B Internal I/O Registers
BRCR⎯Bus Release Control Register
H'EE013
Bus controller
Bit
7
6
5
4
3
2
1
0
A23E A22E A21E A20E
⎯
⎯
⎯
BRLE
Modes Initial value
1
1
1
1
1
1
1
0
1, 2 Read/Write ⎯
⎯
⎯
⎯
⎯
⎯
⎯
R/W
Modes Initial value
1
1
1
0
1
1
1
0
3, 4 Read/Write R/W
R/W
R/W
⎯
⎯
⎯
⎯
R/W
Address 23 to 20 enable
0 Address output
1 Other input/output
Bus release enable
The bus cannot be
0 released to an
external device
The bus can be
1 released to an
external device
ISCR⎯IRQ Sense Control Register
H'EE014
Interrupt Controller
Bit
7
⎯
Initial value
0
Read/Write R/W
6
5
4
3
2
1
0
⎯ IRQ5SC IRQ4SC IRQ3SC IRQ2SC IRQ1SC IRQ0SC
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W R/W
IRQ5 to IRQ0 sense control
0 Interrupts are requested when IRQ5 toIRQ0 are low
1 Interrupts are requested by falling-edge input at IRQ5 to IRQ0
Rev.5.00 Sep. 12, 2007 Page 649 of 764
REJ09B0396-0500