HD6413007F20 Datasheet, PDF (408/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

10. 8-Bit Timers
H'FF
TCORA
TCORB
H'00
8TCNT
Counter clear
TMO
10.7
Figure 10.17 Example of Pulse Output
Usage Notes
Note that the following kinds of contention can occur in 8-bit timer operation.
10.7.1 Contention between 8TCNT Write and Clear
If a timer counter clear signal occurs in the T₃ state of a 8TCNT write cycle, clearing of the
counter takes priority and the write is not performed. Figure 10.18 shows the timing in this case.
8TCNT write cycle
T1
T2
T3
φ
Address bus
8TCNT address
Internal write signal
Counter clear signal
8TCNT
N
H'00
Figure 10.18 Contention between 8TCNT Write and Clear
Rev.5.00 Sep. 12, 2007 Page 378 of 764
REJ09B0396-0500