HD6413007F20 Datasheet, PDF (404/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

10. 8-Bit Timers
⎯ Setting when Input Capture Occurs
• The CMFB flag is set to 1 in 8TCR0 and 8TCR1 when the ICE bit is 1 in 8TCSR1 and
input capture occurs.
• TMIO₁ pin input capture input signal edge detection is selected by bits OIS3 and OIS2
in 8TCSR0.
⎯ Counter Clear Specification
• If counter clear on compare match or input capture has been selected by the CCLR1
and CCLR0 bits in 8TCR0, the 16-bit counter (both 8TCNT0 and 8TCNT1) is cleared.
• The settings of the CCLR1 and CCLR0 bits in 8TCR1 are ignored. The lower 8 bits
cannot be cleared independently.
⎯ OVF Flag Operation
• The OVF flag is set to 1 in 8TCSR0 when the 16-bit counter (8TCNT0 and 8TCNT1)
overflows (from H'FFFF to H'0000).
• The OVF flag is set to 1 in 8TCSR1 when the 8-bit counter (8TCNT1) overflows (from
H'FF to H'00).
• Channels 2 and 3:
When bits CKS2 to CKS0 are set to (100) in 8TCR2, the timer functions as a single 16-bit
timer with channel 2 occupying the upper 8 bits and channel 3 occupying the lower 8 bits.
⎯ Setting when Compare Match Occurs
• The CMF flag is set to 1 in 8TCR2 when a 16-bit compare match occurs.
• The CMF flag is set to 1 in 8TCR3 when a lower 8-bit compare match occurs.
• TMO₂ pin output control by bits OIS3, OIS2, OS1, and OS0 in 8TCSR2 is in
accordance with the 16-bit compare match conditions.
• TMIO₃ pin output control by bits OIS3, OIS2, OS1, and OS0 in 8TCSR3 is in
accordance with the lower 8-bit compare match conditions.
⎯ Setting when Input Capture Occurs
• The CMFB flag is set to 1 in 8TCR2 and 8TCR3 when the ICE bit is 1 in 8TCSR3 and
input capture occurs.
• TMIO₃ pin input capture input signal edge detection is selected by bits OIS3 and OIS2
in 8TCSR2.
⎯ Counter Clear Specification
• If counter clear on compare match has been selected by the CCLR1 and CCLR0 bits in
8TCR2, the 16-bit counter (both 8TCNT2 and 8TCNT3) is cleared.
• The settings of the CCLR1 and CCLR0 bits in 8TCR3 are ignored. The lower 8 bits
cannot be cleared independently.
Rev.5.00 Sep. 12, 2007 Page 374 of 764
REJ09B0396-0500