HD6413007F20 Datasheet, PDF (683/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix B Internal I/O Registers
MSTCRH⎯Module Standby Control Register H H'EE01C
System control
Bit
7
6
5
4
3
2
1
0
PSTOP ^⎯
⎯
⎯
⎯ _{MSTPH2 MSTPH1 MSTPH0}
Initial value
0
1
1
1
1
0
0
0
Read/Write
R/W
⎯
⎯
⎯
⎯
R/W
R/W
R/W
Reserved bits
φ clock stop
Enables or disables φ clock output.
Module standby H2 to H0
Selection bits for placing modules
in standby state.
MSTCRL⎯Module Standby Control Register L
H'EE01D
System control
Bit
Initial value
Read/Write
7
6
MSTPL7 ^⎯
0
0
R/W
R/W
5
4
3
2
MSTPL5 MSTPL4 MSTPL3 MSTPL2
0
0
0
0
R/W
R/W
R/W R/W
1
0
⎯ _MSTPL0
0
0
R/W R/W
Reserved bits
Module standby L7, L5 to L2, L0
Selection bits for placing modules
in standby state.
Rev.5.00 Sep. 12, 2007 Page 653 of 764
REJ09B0396-0500