HD6413007F20 Datasheet, PDF (283/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

8. I/O Ports
P6₇ functions as the clock output pin (φ) or an input port. P6₇ is the clock input pin (φ) if the
PSTOP bit in MSTCRH is cleared to 0 (initial value), and an input port if this bit is set to 1.
When P6₂ to P6₀ function as input/output ports, the pin becomes an output port if the
corresponding P6DDR bit is set to 1, and an input port if this bit is cleared to 0.
P6DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P6DDR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode,
it retains its previous setting. When port 6 functions as a generic input/output port, if a P6DDR bit
is set to 1, the corresponding pin maintains its output state in software standby mode.
Port 6 Data Register (P6DR): P6DR is an 8-bit readable/writable register that stores output data
for port 6. When port 6 functions as an output port, the value of this register is output.
Bit
7
6
5
4
3
2
1
0
P6₇
P6₆
P6₅
P6₄
P6₃
P6₂
P6₁
P6₀
Initial value
*
0
0
0
0
0
0
0
Read/Write
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Data 7, 2 to 0 for port 6 pins
Bits storing data for port 6 pins
Reserved bit
Note: * Determined by pin P6₇.
Bit 7 returns 1 if read when the PSTOP bit in MSTCRH is 0, and returns the logic level of pin P6₇
if read when the PSTOP bit is 1. This bit cannot be modified.
Bits 6 to 3 are reserved; they can be read and written to, but cannot be used as ports.
The P6DR value is returned if P6DR is read while the corresponding bit (P6₆DDR to P6₃DDR) in
P6DDR is set to 1, and an undefined value is returned if P6DR is read while the corresponding bit
is cleared to 0.
For bits 2 to 0, the pin logic level is returned if the bit is read while the corresponding bit in
P6DDR is cleared to 0, and the P6DR value is returned if the bit is read while the corresponding
bit in P6DDR is set to 1.
P6DR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Rev.5.00 Sep. 12, 2007 Page 253 of 764
REJ09B0396-0500