HD6413007F20 Datasheet, PDF (353/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

9. 16-Bit Timer
• Output compare output timing
The compare match signal is generated in the last state in which 16TCNT and the general
register match (when 16TCNT changes from the matching value to the next value). When the
compare match signal is generated, the output value selected in TIOR is output at the output
compare pin (TIOCA or TIOCB). When 16TCNT matches a general register, the compare
match signal is not generated until the next counter clock pulse.
Figure 9.20 shows the output compare timing.
φ
16TCNT input
clock
16TCNT
N
N+1
GR
Compare
match signal
TIOCA,
TIOCB
N
Figure 9.20 Output Compare Output Timing
Input Capture Function: The 16TCNT value can be captured into a general register when a
transition occurs at an input capture/output compare pin (TIOCA or TIOCB). Capture can take
place on the rising edge, falling edge, or both edges. The input capture function can be used to
measure pulse width or period.
Rev.5.00 Sep. 12, 2007 Page 323 of 764
REJ09B0396-0500