HD6413007F20 Datasheet, PDF (558/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

15. A/D Converter
Table 15.4 A/D Conversion Time (Single Mode)
CKS = 0
CKS = 1
Symbol
Min
Typ
Max Min
Typ
Max
Synchronization delay
t
D
6
⎯
9
4
⎯
5
Input sampling time
t
SPL
⎯
31
⎯
⎯
15
⎯
A/D conversion time
t_CONV
131
⎯
134 69
⎯
70
Note: Values in the table are numbers of states.
15.4.4 External Trigger Input Timing
A/D conversion can be externally triggered. When the TRGE bit is set to 1 in ADCR and the 8-bit
timer's ADTE bit is cleared to 0, external trigger input is enabled at the ADTRG pin. A falling
edge at the ADTRG pin sets the ADST bit to 1 in ADCSR, starting A/D conversion. Other
operations, in both single and scan modes, are the same as if the ADST bit had been set to 1 by
software. Figure 15.6 shows the timing.
φ
ADTRG
Internal trigger
signal
ADST
A/D conversion
Figure 15.6 External Trigger Input Timing
15.5 Interrupts
The A/D converter generates an interrupt (ADI) at the end of A/D conversion. The ADI interrupt
request can be enabled or disabled by the ADIE bit in ADCSR. The ADI interrupt request can be
designated as a DMAC activation source. In this case, an interrupt request is not sent to the CPU.
Rev.5.00 Sep. 12, 2007 Page 528 of 764
REJ09B0396-0500