MC9S12T64 Datasheet, PDF (75/608 Pages) Motorola, Inc – Specification

Port E
Port K
Freescale Semiconductor, Inc.
Pinout and Signal Description
Port Signals
an output; clearing a bit in DDRB makes the corresponding bit in port B
an input. The default reset state of DDRB is all zeroes.
This register is not in the on-chip map in expanded and peripheral
modes.
Port E is associated with external bus control signals and interrupt
inputs. These include mode select (PE7/NOACC/XCLKS,
PE6/MODB/IPIPE1, PE5/MODA/IPIPE0), E clock, size
(LSTRB/TAGLO), read / write (R/W), IRQ, and XIRQ. When the
associated pin is not used for one of these specific functions, the pin can
be used as general purpose I/O with the exception of IRQ and XIRQ.
The Port E Assignment Register (PEAR) selects the function of each pin
and DDRE determines whether each pin is an input or output when it is
configured to be general purpose I/O. DDRE also determines the source
of data for a read of PORTE.
The XCLKS input selects between Colpitts oscillator or Pierce
oscillator/an external clock configuration.
Some of these pins have software selectable pullups (NOACC, ECLK,
LSTRB, R/W, IRQ and XIRQ). A single control bit enables the pullups for
all of these pins when they are configured as inputs.
This register is not in the on-chip map in peripheral mode or in expanded
modes when the EME bit is set.
This port is associated with the internal memory emulation pin. When the
port is not enabled to emulate the internal memory, the port pin is used
as general-purpose I/O.
When input, this pin can be selected to be high impedance or pulled up,
based upon the state of the PUPKE bit in the PUCR register.
Register DDRK determines whether port K pin is an input or output when
configured as general-purpose I/O. DDRK is not in the address map
during expanded and peripheral mode operation with EMK set. Setting
a bit in DDRK makes the corresponding bit in port K an output; clearing
Pinout and Signal Description
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MC9S12T64Revision 1.1.1