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MC9S12T64 Datasheet, PDF (509/608 Pages) Motorola, Inc – Specification
Freescale Semiconductor, Inc.
Analog to Digital Converter (ATD)
Register Descriptions
Port Data Register
(PORTAD)
Address Offset: $008F
Bit 7
Read: PTAD 7
Write:
Pin Function
AN7
Reset:
1
The data port associated with the ATD is input-only. The port pins are shared
with the analog A/D inputs AN7-0.
6
PTAD6
5
PTAD5
4
PTAD4
3
PTAD3
2
PTAD2
1
PTAD1
Bit 0
PTAD0
AN6
AN5
AN4
AN3
AN2
AN1
AN0
1
1
1
1
1
1
1
Unimplemented or Reserved
Read: anytime. If the digital input buffers are disabled (IENx=0), read
returns a 1.
Write: anytime, no effect
The A/D input channels may be used for general purpose digital input.
PTADx — A/D Channel x (ANx) Digital Input (x= 7,6,5,4,3,2,1,0)
If the digital input buffer on the ANx pin is enabled (IENx=1) read
returns the logic level on ANx pin (signal potentials not meeting VIL or
VIH specifications will have an indeterminate value)).
If the digital input buffers are disabled (IENx=0), read returns a “1”.
Reset sets all PORTAD bits to “1”.
Analog to Digital Converter (ATD)
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MC9S12T64Revision 1.1.1