MC9S12T64 Datasheet, PDF (529/608 Pages) Motorola, Inc – Specification

SPI Mode
Selecting SPI
Mode
Freescale Semiconductor, Inc.
Fast Background Debug Module (FBDM)
Functional Description
index register (X), Y index register (Y), stack pointer (SP), and program
counter (PC).
Hardware commands can be executed at any time and in any mode
excluding a few exceptions as highlighted in Modes of Operation below.
Firmware commands can only be executed when the system is in active
background debug mode (BDM).
An SPI mode option has been added to this module. When SPI mode is
selected, the single wire interface becomes three wires: serial slave data
in (SI), serial slave data out (SO) and serial slave clock in (SCK). As in
the single wire mode, the external system still initiates and controls all
transfers. The dedicated pins allow faster transfer rates, up to one
quarter the bus frequency per bit.
While in SPI mode, the delay time between an address and read data is
shortened to always steal the next available cycle. On parts operating in
single chip mode, this will be 8 target clock cycles (detailed explanation
in Hardware Delay in SPI Mode). It will take 21 target clock cycles for
parts with memory and / or peripherals on an external bus (to allow for
misaligned, narrow bus and stretched accesses on the cycle before the
steal and to allow for narrow bus and stretched accesses on the steal
cycle).
Also while in SPI mode, there is one hardware command with added
functionality. The read word instruction will take in a new address while
the data is being output. Then another address can be sent in while the
data from the previous address is sent out (full duplex operation). When
the user has completed the operation, an $FFFF needs to be sent in as
the address. This will quit the read word instruction and the next input
will be a new command. Note that this is the only instruction with this
operation enhancement.
The core has an input (SCKBDM / SPIMODE) which selects whether the
BDM will use a single wire interface or the SPI type interface. This
selection occurs at the release of reset and cannot be changed until the
next reset. SPIMODE = 1 during reset for selecting the SPI type interface
and SPIMODE = 0 during reset for selecting the single wire interface.
Fast Background Debug Module (FBDM)
For More Information On This Product,
Go to: www.freescale.com
MC9S12T64Revision 1.1.1