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| MC9S12T64 Datasheet, PDF (290/608 Pages) Motorola, Inc – Specification | |||
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Freescale Semiconductor, Inc.
Clocks and Reset Generator (CRG)
Table 51 RTI Frequency Divide Rates (Continued)
RTR[3:0]
13 (÷14)
14 (÷15)
15 (÷16)
000
(OFF)
OFF (2)
OFF (2)
OFF (2)
001
(210)
14x210
15x210
16x210
010
(211)
14x211
15x211
16x211
RTR[6:4] =
011
(212)
14x212
15x212
16x212
100
(213)
14x213
15x213
16x213
101
(214)
14x214
15x214
16x214
1. Denotes default value out of reset
2. These values should be used to disable the RTI to ensure future backwards compatibility.
110
(215)
14x215
15x215
16x215
111
(216)
14x216
15x216
16x216
MC9S12T64Revision 1.1.1
Clocks and Reset Generator (CRG)
For More Information On This Product,
Go to: www.freescale.com
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