MC9S12T64 Datasheet, PDF (112/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Operating Modes
Special Operating
Modes
There are two special operating modes that correspond to normal
operating modes. These operating modes are commonly used in factory
testing and system development.
Special
Single-Chip Mode
When the MCU is reset in this mode, the background debug mode is
enabled and “active”. The MCU does not fetch the reset vector and
execute application code as it would in other modes. Instead, the active
background debug mode is in control of CPU execution and BDM
firmware is waiting for additional serial commands through the BKGD
pin. When a serial command instructs the MCU to return to normal
execution, the system will be configured as described below unless the
reset states of internal control registers have been changed through
background commands after the MCU was reset.
There is no external expansion bus after reset in this mode. Ports A and
B are initially simple bidirectional I/O pins that are configured as
high-impedance inputs with internal pullups disabled; however, writing to
the mode select bits in the MODE register (which is allowed in special
modes) can change this after reset. All of the Port E pins (except
PE4/ECLK) are initially configured as general purpose high-impedance
inputs with pullups enabled. PE4/ECLK is configured as the E clock
output in this mode.
The pins associated with Port E bits 6, 5, 3, and 2 cannot be configured
for their alternate functions IPIPE1, IPIPE0, LSTRB, and R/W while the
MCU is in single chip modes. The associated control bits PIPOE, LSTRE
and RDWE are reset to zero. Writing the opposite value into these bits
in this mode does not change the operation of the associated Port E
pins.
Port E, bit 4 can be configured for a free-running E clock output by
clearing NECLK in the PEAR register. Typically, the only use for an E
clock output while the MCU is in single chip modes would be to get a
constant speed clock for use in the external application system.
NOTE:
When the MCU starts in the special single chip mode, the INITCRM and
PPAGE registers are overwritten by the secure BDM firmware. The CPU
registers also overwritten by the firmware. These overwritten values are
unknown and not guaranteed.
MC9S12T64Revision 1.1.1
Operating Modes
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