MC9S12T64 Datasheet, PDF (589/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Electrical Characteristics
External Bus Timing
Table 121 Expanded Bus Timing Characteristics – 16MHz
Conditions are shown in Table 106 unless otherwise noted, C_LOAD = 50pF
Num
Rating
Symbol
Min
Typ
Max
1 Frequency of operation (E-clock)
f_o
2 Cycle time
t_cyc
3 Pulse width, E low
4
Pulse width, E high⁽¹⁾
PW_EL
PW_EH
5 Address delay time
t_AD
6 Address valid time to E rise (PW_EL–t_AD)
t_AV
7 Muxed address hold time
t_MAH
8 Address hold to data valid
t_AHDS
9 Data hold to address
t_DHA
10 Read data setup time
t_DSR
11 Read data hold time
t_DHR
12 Write data delay time
t_DDW
13 Write data hold time
14 Write data setup time⁽¹⁾ (PW_EH–t_DDW)
15 Address access time⁽¹⁾ (t_cyc–t_AD–t_DSR)
16 E high access time⁽¹⁾ (PW_EH–t_DSR)
t_DHW
t_DSW
t_ACCA
t_ACCE
20 Chip select delay time
21 Chip select access time⁽¹⁾ (t_cyc–t_CSD–t_DSR)
t_CSD
t_ACCS
22 Chip select hold time
t_CSH
23 Chip select negated time
t_CSN
24 Read/write delay time
t_RWD
25 Read/write valid time to E rise (PW_EL–t_RWD) t_RWV
26 Read/write hold time
t_RWH
27 Low strobe delay time
t_LSD
28 Low strobe valid time to E rise (PW_EL–t_LSD)
t_LSV
29 Low strobe hold time
t_LSH
30 NOACC strobe delay time
t_NOD
31 NOACC valid time to E rise (PW_EL–t_NOD)
t_NOV
32 NOACC hold time
t_NOH
33 ECLK Low to IPIPE[1:0] delay time
t_P0D
34 IPIPE[1:0] valid time to E rise (PW_EL–t_P0D)
t_P0V
0
62.5
29
29
11
–5
9
–2
25
–5
–3
13
19
4
17
–5
11
14
–5
14
–5
15
–6
0
16
16.0
18
16
20
15
15
14
12
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Electrical Characteristics
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MC9S12T64Revision 1.1.1