MC9S12T64 Datasheet, PDF (323/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Clocks and Reset Generator (CRG)
Reset Description
These combinations are shown in Table 58 with the correspondent
events that caused them to be set. PORLVDRF is set when a power-on
or a low-voltage reset occurs, while LVDF is set when a low-voltage
condition is detected.
Table 58 Relation between PORLVDRF and LVDF
PORLVDRF
LVDF
Event
Neither POR nor LVDR
0
0
occurred. No low-voltage
condition detected⁽¹⁾
Neither POR nor LVDR
occurred. Low-voltage
0
1
condition detected but
LVD reset not enabled
(LVDRE=0)⁽¹⁾
1
0
POR occurred
1
1
LVDR occurred
1. Considering that PORLVDRF and LVDF flags were cleared by the program after POR or
LVDR.
Clocks and Reset Generator (CRG)
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MC9S12T64Revision 1.1.1