MC9S12T64 Datasheet, PDF (191/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Low-Voltage Detector (LVD)
Functional Description
Functional Description
Figure 21 shows the structure of the LVD module. The LVD enable bit
(LVDE) in the LVD control register (LVDCR) is set out of power-on reset,
enabling the LVD to monitor the VDDR voltage. The LVD monitors the
voltage on the VDDR pin by means of the bandgap reference circuit and
the comparator.The LVDF flag in the LVD status register (LVDSR) is set
whenever the VDDR voltage falls to V_LVR level and remains at or below
that level for 17 or more consecutive bus clock cycles. Under such
condition, the part is reset if the LVD reset enable bit (LVDRE) in LVDCR
is logical 1. Once an LVD reset occurs, the MCU remains in reset until
VDDR rises above the voltage V_LVRR.
An LVD reset also drives the RESET pin low to provide low-voltage
protection to external peripheral devices.
Polled LVD
Operation
In applications that can operate at VDDR levels below the V_LVR level,
software can monitor VDDR by polling the LVDF bit. In the control
register, the LVDE bit must be at logic 1 to enable the LVD module, and
the LVDRE bit must be at logic 0 to disable LVD resets.
Forced Reset
Operation
In applications that require VDDR to remain above the V_LVR level,
enabling LVD resets allows the LVD module to reset the MCU when
VDDR falls to the V_LVR level and remains at or below that level.In the
control register, LVDE and LVDRE bits must be at logic 1 to enable the
LVD module and to enable LVD resets.
False Reset
Protections
The LVD module has two false reset protections.
1. The LVD module contains a hysteresis circuit to reduce the
possibility of false resets due to power supply noise.
2. The VDDR pin level is digitally filtered to reduce false resets due
to power supply noise. In order for the LVD module to reset the
MCU, VDDR must fall to the V_LVR level and remains at or below
that level for 17 or more consecutive bus clock cycles. VDDR must
be above V_LVRR for only one bus clock cycle to bring the MCU out
Low-Voltage Detector (LVD)
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MC9S12T64Revision 1.1.1