MC9S12T64 Datasheet, PDF (53/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Central Processing Unit (CPU)
Instruction Set Overview
Table 6 Source Form Notation
abc
abcdxysp
abd
abdxysp
dxysp
msk8
opr8i
opr16i
opr8a
opr16a
oprx0_xysp
oprx3
oprx5
oprx9
oprx16
page
rel8
rel9
rel16
trapnum
xysp
xysppc
Register designator for A, B, or CCR
Register designator for A, B, CCR, D, X, Y, or SP
Register designator for A, B, or D
Register designator for A, B, D, X, Y, or SP
Register designator for D, X, Y, or SP
8-bit mask value
Some assemblers require the # symbol before the mask value.
8-bit immediate value
16-bit immediate value
8-bit address value used with direct address mode
16-bit address value
Indexed addressing postbyte code:
oprx3,–xysp — Predecrement X , Y, or SP by 1–8
oprx3,+xysp — Preincrement X , Y, or SP by 1–8
oprx3,xysp– — Postdecrement X, Y, or SP by 1–8
oprx3,xysp+ — Postincrement X, Y, or SP by 1–8
oprx5,xysppc — 5-bit constant offset from X, Y, SP, or PC
abd,xysppc — Accumulator A, B, or D offset from X, Y, SP, or PC
Any positive integer from 1 to 8 for pre/post increment/decrement
Any integer from –16 to +15
Any integer from –256 to +255
Any integer from –32,768 to +65,535
8-bit value for PPAGE register
Some assemblers require the # symbol before this value.
Label of branch destination within –256 to +255 locations
Label of branch destination within –512 to +511 locations
Any label within the 64-Kbyte memory space
Any 8-bit integer from $30 to $39 or from $40 to $FF
Register designator for X or Y or SP
Register designator for X or Y or SP or PC
Central Processing Unit (CPU)
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MC9S12T64Revision 1.1.1