MC9S12T64 Datasheet, PDF (220/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Flash EEPROM 64K
Functional Description
Program and
Erase Operation
Writing the
FCLKDIV Register
Write and read operations are both used for the program and erase
algorithms described in this section. These algorithms are controlled by
a state machine whose timebase FCLK is derived from the oscillator
clock via a programmable divider. The command register as well as the
associated address and data registers operate as a buffer and a register
(2-stage FIFO), so that a new command along with the necessary data
and address can be stored to the buffer while the previous command is
still in progress. This pipelined operation allows a time optimization when
programming more than one word on a specific row, as the high voltage
generation can be kept ON in between two programming commands.
The pipelined operation also allows a simplification of command
launching. Buffer empty as well as command completion are signalled
by flags in the Flash status register. Interrupts for the Flash will be
generated if enabled.
The next four subsections describe:
• How to write the FCLKDIV register.
• The write sequences used to program, erase and erase-verify the
Flash.
• Valid Flash commands.
• Errors resulting from illegal Flash operations.
Prior to issuing any program or erase command, it is first necessary to
write the FCLKDIV register to divide the oscillator down to within the
150kHz to 200kHz range.The program and erase timings are also a
function of the bus clock, such that the FCLKDIV determination must
take this information into account. If we define:
• FCLK as the clock of the Flash timing control block
• Tbus as the period of the bus clock
• INT(x) as taking the integer part of x (e.g. INT(4.323)=4),
then FCLKDIV register bits PRDIV8 and FDIV[5:0] are to be set as
described in Figure 27.
For example, if the oscillator clock frequency is 4Mz and the bus clock is
25MHz, FCLKDIV bits FDIV[5:0] should be set to 20 (010100) and bit
MC9S12T64Revision 1.1.1
Flash EEPROM 64K
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