MC9S12T64 Datasheet, PDF (211/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Flash EEPROM 64K
Register Descriptions
FPROT — Flash
Protection
Register
The FPROT register defines which Flash sectors are protected against
program or erase. This register is banked.
Address Offset: $0104
Bit 7
6
5
4
Read:
FPOPEN
NV6
FPHDIS FPHS1
Write:
Reset: F
F
F
F
= Reserved or unimplemented
3
FPHS0
F
2
FPLDIS
F
1
FPLS1
F
Bit 0
FPLS0
F
The FPROT register is readable in normal and special modes. Bit NV6
is not writable. FPOPEN, FPHDIS and FPLDIS bits in the FPROT
register can only be written to the protected state (i.e. 0). FPLS[1:0] can
be written anytime until bit FPLDIS is cleared. FPHS[1:0] bits can be
written anytime until bit FPHDIS is cleared. If the FPOPEN bit is cleared,
then the state of the FPHDIS, FPHS[1:0], FPLDIS and FPLS[1:0] bits is
irrelevant. The FPROT register is loaded from Flash array during reset
according to the following table.
Table 42 Loading of the Protection Register from Flash
Flash Address
$FF0D
$FF0C
Protection byte for
Flash block 0
Flash block 1
NOTE: Access to this register during Flash Super User mode (FSUM=1) will
cause the ACCERR bit set.
To change the Flash protection that will be loaded on reset, the upper
sector of Flash must be unprotected, then the Flash Protect/Security
byte located as described in Table 37 must be written to.
A protected Flash sector is disabled by the bits FPHDIS and FPLDIS
while the size of the protected sector is defined by FPHS[1:0] and
FPLS[1:0] in the FPROT register.
Flash EEPROM 64K
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MC9S12T64Revision 1.1.1