MC9S12T64 Datasheet, PDF (65/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Pinout and Signal Description
Signal Descriptions
Signal Descriptions
EXTAL, XTAL —
Oscillator Pins
EXTAL and XTAL are the crystal driver and external clock pins. On reset
all the device clocks are derived from the EXTAL input frequency. XTAL
is the crystal output.
Refer to the Clocks and Reset Generator (CRG) section for more
information.
RESET — External
Reset Pin
An active low bidirectional control signal, it acts as an input to initialize
the MCU to a known start-up state, and an output when an internal MCU
function causes a reset.
TEST — Test Pin
This input only pin is reserved for test.
NOTE: The TEST pin must be tied to VSS in all applications.
VREGEN —
Voltage Regulator
Enable Pin
This input only pin enables or disables the on-chip voltage regulator.
XFC — PLL Loop
Filter Pin
PLL loop filter. Please ask your Motorola representative for the
interactive application note to compute PLL loop filter elements. Any
current leakage on this pin must be avoided. Refer to the Clocks and
Reset Generator (CRG) section for more information.
BKGD / TAGHI / SI /
MODC —
Background
Debug, Tag High,
and Mode Pin
The BKGD/TAGHI/SI/MODC pin is used as a pseudo-open-drain pin for
the background debug communication. In MCU expanded modes of
operation when instruction tagging is on, an input low on this pin during
the falling edge of E-clock tags the high half of the instruction word being
read into the instruction queue. It is used as a MCU operating mode
select pin during reset. The state of this pin is latched to the MODC bit
at the rising edge of RESET.
Pinout and Signal Description
For More Information On This Product,
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MC9S12T64Revision 1.1.1