MC9S12T64 Datasheet, PDF (547/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Breakpoint (BKP)
Contents
Overview
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 547
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 548
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 550
External Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 552
Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 552
Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 553
Breakpoint Priority . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 560
Reset Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 560
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 560
The Breakpoint sub-block of the Core provides for hardware breakpoints
that are used to debug software on the CPU by comparing actual
address and data values to predetermined data in setup registers. A
successful comparison will place the CPU in Background Debug Mode
or initiate a software interrupt (SWI).
The Breakpoint Module contains two modes of operation:
1. Dual Address Mode, where a match on either of two addresses
will cause the system to enter Background Debug Mode or initiate
a Software Interrupt (SWI).
2. Full Breakpoint Mode, where a match on address and data will
cause the system to enter Background Debug Mode or initiate a
Software Interrupt (SWI).
There are two types of breakpoints, forced and tagged. Forced
breakpoints occur at the next instruction boundary if a match occurs and
Breakpoint (BKP)
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MC9S12T64Revision 1.1.1