MC9S12T64 Datasheet, PDF (275/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Clocks and Reset Generator (CRG)
Block Diagram
Block Diagram
The block diagram below shows a high level view of the CRG and OSC
modules.
VREG / LVD
Power on
Reset
CRG
RESET
XCLKS
EXTAL
XTAL
Clock ^{CM fail}
Monitor
OSC
OSCCLK
XFC
VDDPLL
VSSPLL
PLL
PLLCLK
Clock and Reset
Control
Reset
Generator
Clock Quality
Checker
COP RTI
Registers
System
Reset
Bus Clock
Core Clock
Oscillator
Clock
Figure 40 Block diagram of CRG
Clocks and Reset Generator (CRG)
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Go to: www.freescale.com
MC9S12T64Revision 1.1.1