MC9S12T64 Datasheet, PDF (133/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Module Mapping Control (MMC)
Functional Description
PIX5
1
1
1
1
RTC instructions will be complete before the end of the associated
instruction.
Table 25 Program space page index in special modes
PIX4
1
1
1
1
PIX3
1
1
1
1
PIX2
1
1
1
1
PIX1
0
0
1
1
PIX0
0
1
0
1
Program Space Selected
16K Flash EEPROM Page $3C
16K Flash EEPROM Page $3D
16K Flash EEPROM Page $3E
16K Flash EEPROM Page $3F
Functional Description
The MMC sub-block performs four basic functions of the Core operation:
bus control, address decoding and select signal generation, memory
expansion, and security decoding for the system. Each aspect is
described in the following subsections.
Bus Control
The MMC controls the address bus and data buses that interface the
Core with the rest of the system. This includes the multiplexing of the
input data buses to the Core onto the main CPU read data bus and
control of data flow from the CPU to the output address and data buses
of the Core. In addition, the MMC handles all CPU read data bus
swapping operations.
Address Decoding
As data flows on the Core address bus, the MMC decodes the address
information, determines whether the internal Core register or firmware
space, the peripheral space or a memory register or array space is being
addressed and generates the correct select signal. This decoding
operation also interprets the mode of operation of the system and the
state of the mapping control registers in order to generate the proper
select. The MMC also generates the Emulation Chip Select (ECS)
signal.
Module Mapping Control (MMC)
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MC9S12T64Revision 1.1.1