MC9S12T64 Datasheet, PDF (254/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Port Integration Module (PIM)
Register name
Bit 7
6
5
4
3
2
1
Bit 0
Addr.
Offset
PPSS
Read:
Write:
PPSS7
PPSS6
PPSS5
PPSS4
PPSS3
PPSS2
PPSS1
PPSS0 $00ED
WOMS
Read:
Write:
WOMS7
WOMS6
WOMS5
WOMS4
WOMS3
WOMS2
WOMS1
WOMS0
$00EE
Reserved
Read:
Write:
0
0
0
0
0
0
0
0 _$00EF
PTP
Read:
Write:
PTP7
PTP6
PTP5
PTP4
PTP3
PTP2
PTP1
PTP0 $00F0
PTIP
Read:
Write:
PTIP7
PTIP6
PTIP5
PTIP4
PTIP3
PTIP2
PTIP1
PTIP0 _$00F1
DDRP
Read:
Write:
DDRP7
DDRP6
DDRP5
DDRP4
DDRP3
DDRP2
DDRP1
DDRP0 $00F2
RDRP
Read:
Write:
RDRP7
RDRP6
RDRP5
RDRP4
RDRP3
RDRP2
RDRP1
RDRP0 $00F3
PERP
Read:
Write:
PERP7
PERP6
PERP5
PERP4
PERP3
PERP2
PERP1
PERP0 $00F4
PPSP
Read:
Write:
PPSP7
PPSP6
PPSP5
PPSP4
PPSP3
PPSP2
PPSP1
PPSP0 $00F5
Reserved
Read:
Write:
0
0
0
0
0
0
0
0 _$00F6
Reserved
Read:
Write:
0
0
0
0
0
0
0
0 _$00F7
= Unimplemented or reserved
Figure 38 PIM9T64 Register Map (Continued)
NOTE: Register Address = Base Address (INITRG) + Address Offset
MC9S12T64Revision 1.1.1
Port Integration Module (PIM)
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