MC9S12T64 Datasheet, PDF (117/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Operating Modes
Secured Mode of Operation
and provides a full set of debug operations. Some BDM commands can
be executed while the CPU is operating normally. Other BDM
commands are firmware based, and require the BDM firmware to be
enabled and active for execution.
In special single-chip mode, BDM is enabled and active immediately out
of reset. BDM is available in all other operating modes, but must be
enabled before it can be activated. BDM should not be used in special
peripheral mode because of potential bus conflicts.
Once enabled, background debug mode can be made active by a serial
command sent via the BKGD pin or execution of a CPU12 BGND
instruction. While background debug mode is active, the CPU can
interpret special debugging commands, and read and write CPU
registers, peripheral registers, and locations in memory.
While BDM is active, the CPU executes code located in a small on-chip
ROM mapped to addresses $FF20 to $FFFF, and BDM control registers
are accessible at addresses $FF00 to $FF06. The BDM ROM replaces
the regular system vectors while BDM is active. While BDM is active, the
user memory from $FF00 to $FFFF is not in the map except through
serial BDM commands.
Secured Mode of Operation
The device will make available a security feature preventing the
unauthorized read and write of the memory contents. This feature
allows:
• Protection of the contents of FLASH,
• Protection of the contents of CALRAM,
• Operation in single-chip mode,
• Operation from external memory with internal FLASH and
CALRAM disabled.
The user must be reminded that part of the security must lie with the
user’s code. An extreme example would be user’s code that dumps the
Operating Modes
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MC9S12T64Revision 1.1.1