MC9S12T64 Datasheet, PDF (260/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Port Integration Module (PIM)
The SPI pins (PS[7:4]) configuration is determined by several status bits
in the SPI module. See Serial Peripheral Interface (SPI) section on page
457 for details.
The SCI pins associated with transmit pins 3 and 1 are configured as
outputs if the transmitter is enabled.
The SCI pins associated with receive pins 2 and 0 are configured as
inputs if the receiver is enabled. See Serial Communications Interface
(SCI) section on page 419 for details.
Port S Input
Register (PTIS)
Address Offset: $00E9
Bit 7
Read: PTIS7
Write:
Reset:
-
6
PTIS6
5
PTIS5
4
PTIS4
-
-
-
= Reserved or unimplemented
3
PTIS3
-
2
PTIS2
-
1
PTIS1
-
Bit 0
PTIS0
-
Read: Anytime.
Write: Never; writes to this register have no effect.
This register always reads back the status of the associated pins. This
also can be used to detect overload or short circuit conditions on output
pins.
Port S Data
Direction Register
(DDRS)
Address Offset: $00EA
Bit 7
Read:
DDRS7
Write:
Reset: 0
6
5
4
DDRS6 DDRS5 DDRS4
0
0
0
= Reserved or unimplemented
Read: Anytime.
Write: Anytime.
3
DDRS3
0
2
DDRS2
0
1
DDRS1
0
Bit 0
DDRS0
0
MC9S12T64Revision 1.1.1
Port Integration Module (PIM)
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