MC9S12T64 Datasheet, PDF (294/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Clocks and Reset Generator (CRG)
Functional Description
General
This section provides a complete functional description of the CRG. It
gives detailed informations on the internal operation of the design.
Functional Blocks
Oscillator (OSC)
The oscillator block has two external pins, EXTAL and XTAL. The
oscillator input pin, EXTAL, is intended to be connected to either a
crystal or an external clock source. The selection of Colpitts oscillator or
Pierce Oscillator/External clock depends on the XCLKS signal which is
sampled during reset. The XTAL pin is an output signal that provides
crystal circuit feedback and can be buffered to drive other devices with
same voltage amplitude.
A buffered EXTAL signal, OSCCLK, becomes the internal reference
clock. The oscillator is enabled based on the PSTP bit, and the STOP
condition. The oscillator is disabled when the part is in STOP mode
except when Pseudo-Stop mode is enabled.
To improve noise immunity, the oscillator is powered by the VDDPLL
and VSSPLL power supply pins.
The Colpitts oscillator is equipped with a feedback system which does
not waste current generating harmonics. Its configuration is “Colpitts
oscillator with translated ground”. The transconductor used is driven by
a current source under the control of a peak detector which will measure
the amplitude of the AC signal appearing on EXTAL node in order to
implement an Amplitude Limitation Control (ALC) loop. The ALC loop is
in charge of reducing the quiescent current in the transconductor as a
result of an increase in the oscillation amplitude.
The Pierce Oscillator can be used for higher frequencies than possible
with the Colpitts oscillator.
MC9S12T64Revision 1.1.1
Clocks and Reset Generator (CRG)
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