MC9S12T64 Datasheet, PDF (189/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Low-Voltage Detector (LVD)
Register Descriptions
Register Descriptions
LVD Control
Register (LVDCR)
Address Offset: $00F8
Bit 7
6
5
4
3
2
1
0
Read:
0
0
0
0
0
0
LVDE
LVDRE
Write:
Power-On
Reset:
1 ⁽¹⁾
1 ⁽¹⁾
0
0
0
0
0
0
= Unimplemented or reserved
1. LVDE and LVDRE bits are set when a power on reset (POR) occurs. Unaffected by non-POR resets.
Read anytime. Write anytime.
LVDE — LVD Enable bit
This LVDE bit controls whether the LVD is enabled.
1 = LVD enabled
0 = LVD disabled
LVDRE — LVD Reset Enable
The LVDRE bit controls the LVD reset if LVDE is set.
1 = LVD reset enabled
0 = LVD reset disabled
Low-Voltage Detector (LVD)
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MC9S12T64Revision 1.1.1