MC9S12T64 Datasheet, PDF (510/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Analog to Digital Converter (ATD)
ATDDRx A/D
Conversion Result
Registers
(ATDDR0–7)
Where: x = 0, 1, 2, 3, 4, 5, 6, 7
Left Justified Result Data
Address Offset: $0090, $0092, $0094, $0096, $0098, $009A, $009C, $009E
ATDDRxH Bit 15
14
13
12
11
10
Read: Bit 9 MSB
8
7
6
5
4
10-bit data
Write:
Read: Bit 7 MSB
6
5
4
3
2
8-bit data
Write:
Reset
U
U
U
U
U
U
Address Offset: $0091, $0093, $0095, $0097, $0099, $009B, $009D, $009F
ATDDRxL Bit 7
6
5
4
3
2
Read:
Bit 1
Bit 0
0
0
0
0
10-bit data
Write:
Read:
U
U
0
0
0
0
8-bit data
Write:
Reset
U
U
U
U
U
U
Right Justified Result Data
Address Offset: $0090, $0092, $0094, $0096, $0098, $009A, $009C, $009E
ATDDRxH Bit 15
14
13
12
11
10
Read:
0
0
0
0
0
0
10-bit data
Write:
Read:
0
0
0
0
0
0
8-bit data
Write:
Reset
At reset the data format is left justified!
Address Offset: $0091, $0093, $0095, $0097, $0099, $009B, $009D, $009F
ATDDRxL Bit 7
6
5
4
3
2
Read:
Bit 7
6
5
4
3
2
10-bit data
Write:
Read: Bit 7 MSB
6
5
4
3
2
8-bit data
Write:
Reset
At reset the data format is left justified!
9
Bit 8
3
Bit 2
1
Bit 0
U
U
1
Bit 0
0
0
0
0
U
U
9
Bit 9 MSB
Bit 8
Bit 8
0
0
1
Bit 0
1
Bit 0
1
Bit 0
Unimplemented or Reserved
MC9S12T64Revision 1.1.1
Analog to Digital Converter (ATD)
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