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MC9S12T64 Datasheet, PDF (293/608 Pages) Motorola, Inc – Specification
Freescale Semiconductor, Inc.
Clocks and Reset Generator (CRG)
Register Descriptions
Writing any value other than $55 or $AA causes a COP reset. To
restart the COP time-out period you must write $55 followed by a
write of $AA. Other instructions may be executed between these
writes but the sequence ($55, $AA) must be completed prior to
COP end of time-out period to avoid a COP reset. Sequences of
$55 writes or sequences of $AA writes are allowed. When the
WCOP bit is set, $55 and $AA writes must be done in the last 25%
of the selected time-out period; writing any value in the first 75%
of the selected period will cause a COP reset.
Clocks and Reset Generator (CRG)
For More Information On This Product,
Go to: www.freescale.com
MC9S12T64Revision 1.1.1