MC9S12T64 Datasheet, PDF (471/608 Pages) Motorola, Inc – Specification

Master Mode
Freescale Semiconductor, Inc.
Serial Peripheral Interface (SPI)
Functional Description
A write to the SPI data register puts data into the transmit buffer if the
previous transmission was complete. When a transfer is complete,
received data is moved into a receive data register. Data may be read
from this double-buffered system any time before the next transfer is
complete. This 8-bit data register acts as the SPI receive data register
for reads and as the SPI transmit data register for writes. A single SPI
register address is used for reading data from the read data buffer and
for writing data to the shifter.
The clock phase control bit (CPHA) and a clock polarity control bit
(CPOL) in the SPI control register 1 select one of four possible clock
formats to be used by the SPI system. The CPOL bit simply selects a
non-inverted or inverted clock. The CPHA bit is used to accommodate
two fundamentally different protocols by shifting the clock by a half cycle
or by not shifting the clock (see Transmission Formats).
The SPI can be configured to operate as a master or as a slave. When
MSTR in SPI control register1 is set, the master mode is selected; when
the MSTR bit is clear, the slave mode is selected.
The SPI operates in master mode when the MSTR bit is set. Only a
master SPI module can initiate transmissions. A transmission begins by
writing to the master SPI data register. If the shift register is empty, the
byte immediately transfers to the shift register. The byte begins shifting
out on the MOSI pin under the control of the serial clock.
The SPR2, SPR1, and SPR0 baud rate selection bits in conjunction with
the SPPR2, SPPR1, and SPPR0 baud rate preselection bits in the SPI
baud rate register control the baud rate generator and determine the
speed of the shift register. The SCK pin is the SPI clock output. Through
the SCK pin, the baud rate generator of the master controls the shift
register of the slave peripheral.
In master mode, the function of the serial data output pin (MOSI) and the
serial data input pin (MISO) is determined by the SPC0 and MSTR
control bits.
Serial Peripheral Interface (SPI)
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MC9S12T64Revision 1.1.1