MC9S12T64 Datasheet, PDF (142/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Multiplexed External Bus Interface (MEBI)
External Pin Descriptions
The MEBI sub-block of the Core interfaces directly with external system
pins. Table 29 below outlines the pin names and functions and gives a
brief description of their operation.
Table 29 External System Pins Associated With MEBI
Pin Name
Pin Functions
Description
PA7 - PA0
General purpose I/O pins, see PORTA and DDRA registers.
A15 - A8
High-order address lines multiplexed during ECLK low. Outputs except in
special peripheral mode where they are inputs from an external tester
system.
PA7/A15/D15/D7
thru
PA0/A8/D8/D0
D15 - D8
High-order bidirectional data lines multiplexed during ECLK high in
expanded wide modes, peripheral mode & visible internal accesses
(IVIS=1) in emulation expanded narrow mode. Direction of data transfer
is generally indicated by R/W.
D15/D7 thru
D8/D0
Alternate high-order and low-order bytes of the bidirectional data lines
multiplexed during ECLK high in expanded narrow modes and narrow
accesses in wide modes. Direction of data transfer is generally
indicated by R/W.
PB7 - PB0
General purpose I/O pins, see PORTB and DDRB registers.
PB7/A7/D7
thru
PB0/A0/D0
A7 - A0
D7 - D0
Low-order address lines multiplexed during ECLK low. Outputs except in
special peripheral mode where they are inputs from an external tester
system.
Low-order bidirectional data lines multiplexed during ECLK high in
expanded wide modes, peripheral mode & visible internal accesses
(with IVIS=1) in emulation expanded narrow mode. Direction of data
transfer is generally indicated by R/W.
PE7/
NOACC
PE7
NOACC
General purpose I/O pin, see PORTE and DDRE registers.
CPU No Access output. Indicates whether the current cycle is a free
cycle. Only available in expanded modes.
PE6/IPIPE1/
MODB/CLKTO
MODB
PE6
At the rising edge of RESET, the state of this pin is registered into the
MODB bit to set the mode.
General purpose I/O pin, see PORTE and DDRE registers.
IPIPE1
Instruction pipe status bit 1, enabled by PIPOE bit in PEAR.
MC9S12T64Revision 1.1.1
Multiplexed External Bus Interface (MEBI)
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