MC9S12T64 Datasheet, PDF (219/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Flash EEPROM 64K
Register Descriptions
FDATA — Flash
16-bit Data Buffer
and Register
FDATAHI and FDATALO are the Flash data registers. These registers
are banked.
Flash Data High
(FDATAHI) Register
Address Offset: $010A
Bit 7
Read:
DHI7
Write:
Reset: 0
6
5
4
DHI6
DHI5
DHI4
0
0
0
= Reserved or unimplemented
3
DHI3
0
2
DHI2
0
1
DHI1
0
Bit 0
DHI0
0
Flash Data Low
(FDATALO)
Register
Address Offset: $010B
Bit 7
Read:
DLO7
Write:
Reset: 0
6
5
4
DLO6
DLO5
DLO4
0
0
0
= Reserved or unimplemented
3
DLO3
0
2
DLO2
0
1
DLO1
0
Bit 0
DLO0
0
Read: Only in the flash super user mode. In user modes, all FDATA bits
read zero
Write: Only in the flash super user mode.
All FDATA(FDATAHI and FDATALO) bits read zero and are not writable
when the Flash EEPROM module is not in the flash super user mode.
DHI[7:0] and DLO[7:0] — 16-bit Data Register
In flash super user mode, all FDATA bits are readable and writable
when writing to an address within the Flash address range.
Flash EEPROM 64K
For More Information On This Product,
Go to: www.freescale.com
MC9S12T64Revision 1.1.1