MC9S12T64 Datasheet, PDF (255/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Port Integration Module (PIM)
Register Descriptions
Register Descriptions
The following table summarizes the effect on the various configuration
bits, data direction (DDR), output level (I/O), reduced drive (RDR), pull
enable (PE), and polarity select (PS) for the ports. The configuration bit
PS is used for the purposing of selecting either a pull-up or pull-down
device if PE is active.
Table 49 Pin Configuration Summary
DDR I/O RDR PE
0
X
X
0
0
X
X
1
0
X
X
1
1
0
0
X
1
1
0
X
1
0
1
X
1
1
1
X
PS
Function
Pull Device
X
Input
Disabled
0
Input
Pull Up
1
Input
Pull Down
X
Output, full drive to 0
Disabled
X
Output, full drive to 1
Disabled
X Output, reduced drive to 0 Disabled
X Output, reduced drive to 1 Disabled
NOTE: All bits of all registers in this module are completely synchronous to
internal clocks during a register read.
Port Integration Module (PIM)
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MC9S12T64Revision 1.1.1