MC9S12T64 Datasheet, PDF (230/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Flash EEPROM 64K
the flag bits in the FSTAT registers which are updated by internal state
machines.
Run Mode
No special current saving modes available.
Wait Mode
When the MCU enters WAIT mode and any command is active (CCIF =
0) the command will be completed. If enabled, interrupts can be used to
wake the MCU out of Wait mode.
Stop Mode
No low power options exist for this module in stop mode. If a command
is active (CCIF = 0) when the MCU enters the STOP mode, the
command will be aborted and the high voltage circuitry to the Flash array
will be switched off. CCIF and ACCERR flags will be set. If commands
are active in more than one block when STOP occurs, then all the
corresponding CCIF and ACCERR flags will be set. Upon exit from
STOP the CBEIF flag is set and any pending command will not be
executed. The ACCERR flag must be cleared before returning to normal
operation.
WARNING:
As active commands are immediately aborted when the MCU enters
STOP mode, it is strongly recommended that the user does not use the
STOP command during program and erase execution.
Background Debug Mode
In Background Debug Mode (BDM), the FPROT registers are writable. If
the chip is unsecured then all Flash commands listed in Table 45 in 216
can be executed. In special single chip mode if the chip is secured then
the only possible command to execute is Mass Erase.
MC9S12T64Revision 1.1.1
Flash EEPROM 64K
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