MC9S12T64 Datasheet, PDF (228/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Flash EEPROM 64K
Valid Flash
Commands
Figure 45 in page 216 summarizes the valid Flash User commands. Also
shown are the effects of the commands on the Flash
WARNING: It is not permitted to program a Flash word without first erasing the
sector in which that word resides.
Illegal Flash
Operations
This subsection describes the conditions that set ACCERR and PVIOL
flags.
ACCERR flag set
condition
The ACCERR flag will be set during the command write sequence if any
of the following illegal operations are performed, causing the command
write sequence to immediately abort:
1. Writing to the Flash address space before initializing FCLKDIV.
2. Writing to the Flash address space in the range $8000–$BFFF
when PPAGE register does not select a 16K bytes page in the
Flash block selected by the BKSEL bit in special modes.
3. Writing to the Flash address space $0000–$7FFF or
$8000–$FFFF with the BKSEL bit in the FCNFG register not
selecting the Flash block in normal modes.
4. Writing a misaligned word or a byte to the valid Flash address
space.
5. Writing to the Flash address space while CBEIF is not set.
6. Writing a second word to the Flash address space before
executing a program or erase command on the previously written
word.
7. Writing to any Flash register other than FCMD after writing a word
to the Flash address space.
8. Writing a second command to the FCMD register before executing
the previously written command.
9. Writing an invalid user command to the FCMD register in user
mode.
10. Writing to any Flash register other than FSTAT (to clear CBEIF)
after writing to the command register FCMD.
11. The part enters STOP mode and a program or erase command is
in progress. The command is aborted and any pending command
is killed.
MC9S12T64Revision 1.1.1
Flash EEPROM 64K
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