MC9S12T64 Datasheet, PDF (184/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Voltage Regulator (VREG)
Functional Description
The voltage regulator module generates the supply voltage needed for
the core logic as well as for the oscillator/pll section. The reference for
the regulation loops are derived from a voltage divider connected
between VDDA and VSSA. Both regulation loops, VDD and VDDPLL,
consist of an operational amplifier driving an nmos power transistor in
unit gain configuration. If there is no significant demand of output current
(the CPU is in stop or pseudo stop mode) the voltage regulator is
brought into standby mode, to decrease power consumption of the
voltage regulator itself.
The voltage regulator can be enabled/disabled by the logic level on the
VREGEN pin.
Please note VDDA, VDDR and VSSX are internally connected by anti
parallel diodes.
Reset Initialization
On system power up, the voltage regulator is started in run mode if
VREGEN is connected to VDDA. The LVD monitors VDDA to ensure
that the MCU is not executing code while the power supply is out of
specification limits to avoid erroneous operation.
MC9S12T64Revision 1.1.1
Voltage Regulator (VREG)
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